Batch Mixer PLC Program & Ladder Logic (Run It Free Online)
This page walks through a full batch mixer PLC program — the kind of sequential, state-machine logic that controls a real mixing tank: fill with ingredient A, fill with ingredient B, agitate for a fixed time, drain, optionally run a clean-in-place (CIP) wash, then signal ready. Every rung described here maps to a live Batch Mixer scenario you can run directly in your browser. Write the ladder logic, press Run, and the simulated tank fills, mixes, and drains while an auto-grader checks your sequence, interlocks, and timing — no PLC hardware and no software install required.
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How a batch mixer PLC program works
A batch process is sequential by nature: a defined recipe runs through a fixed series of phases, each phase enabling exactly one set of actuators, with hard interlocks preventing any phase from starting before its predecessor finishes. This is fundamentally different from continuous motor control — a batch mixing PLC programming problem is really a state-machine problem, and the cleanest ladder logic solution models it as exactly that.
The Batch Mixer scenario controls a single-tank mixer with six inputs and seven outputs, all defined for you. The inputs are START (%I0.0, momentary start / next-batch push-button), STOP (%I0.1, momentary, treated as a latching fault), CIP_ENABLE (%I0.2, maintained CIP selector switch), TANK_EMPTY_LS (%I0.3, tank-empty level switch), LEVEL_A_LS (%I0.4, ingredient-A level switch at 40% of tank) and LEVEL_B_LS (%I0.5, combined-level switch at 80% of tank). START, STOP, CIP_ENABLE and TANK_EMPTY_LS are pre-wired; you wire the two level switches yourself.
The outputs are VALVE_A (%Q0.0, ingredient-A inlet valve), VALVE_B (%Q0.1, ingredient-B inlet valve), AGITATOR (%Q0.2, agitator motor contactor), DRAIN_VALVE (%Q0.3, tank drain valve), CIP_VALVE (%Q0.4, clean-in-place water inlet valve), READY_LAMP (%Q0.5, batch-ready indicator) and FAULT_LAMP (%Q0.6, fault indicator). The whole exercise in batch process control using PLC logic is making each of these outputs turn on and off in the right phase, and never outside it.
The batch sequence as a state machine
The recipe runs through seven operating states plus a fault state: IDLE → FILLING_A → FILLING_B → MIX → DRAIN → (optional CIP) → READY. The cleanest way to write this batching process PLC ladder logic is one SET/RESET latch per state — S_IDLE, S_FILL_A, S_FILL_B, S_MIX, S_DRAIN, S_CIP, S_READY — with the invariant that exactly one latch is true at any instant. Each transition rung does two things on the same scan: SET the next state and RESET the current one.
Walking the sequence: START with the machine in IDLE moves it to FILLING_A. In FILLING_A, VALVE_A runs until LEVEL_A_LS trips (40% full), which transitions to FILLING_B. VALVE_B then runs until LEVEL_B_LS trips (80% combined), transitioning to MIX. The AGITATOR runs through MIX. When the mix timer expires the machine moves to DRAIN, where DRAIN_VALVE runs until TANK_EMPTY_LS confirms the tank is empty. From DRAIN the logic branches on CIP_ENABLE — to CIP if the operator armed it, straight to READY if not. READY lights READY_LAMP, and pressing START again drops the lamp and re-enters FILLING_A for the next batch.
One subtlety: on the very first scan every latch is false, so the machine would never boot. The canonical solution seeds S_IDLE with a one-shot INIT_DONE latch — on scan one INIT_DONE is still false, so a `/INIT_DONE` rung SETs S_IDLE and a second SETs INIT_DONE, after which both rungs go inert. Because outputs are tied one-to-one to state bits (S_FILL_A drives VALVE_A, S_MIX drives AGITATOR, and so on), getting the state latches right gets the actuators right for free.
Timed phases, the drain branch, and interlocks
Two phases are time-driven rather than sensor-driven, and both use TON (on-delay timer) instructions. In the MIX state, T_MIX is a TON with a 30,000 ms preset driven directly by the S_MIX bit; its .Q output is the condition that advances MIX → DRAIN. This enforces the objective that the AGITATOR must run for at least 30 seconds before DRAIN_VALVE is allowed to open — mixing cannot be short-changed. Likewise the optional CIP phase uses T_CIP, a TON with a 45,000 ms preset driven by S_CIP, and its .Q advances CIP → READY.
The DRAIN exit is the one place the sequence forks, and the clean way to write it is two disjoint transition rungs sharing the TANK_EMPTY_LS condition: one ANDed with CIP_ENABLE (DRAIN → CIP) and one ANDed with NOT CIP_ENABLE (DRAIN → READY). Splitting it this way guarantees the two paths are mutually exclusive and that CIP_VALVE can never open until the tank is physically empty — a real-world interlock, because washing a tank that still holds product is both wasteful and unsafe.
STOP is handled as a latching fault rather than a pause. A single STOP press SETs S_FAULT and RESETs every state latch in one rung group, which immediately drops all the actuator coils because each output is tied to its now-false state bit. FAULT_LAMP lights. This models the fail-safe expectation for batch process control using PLC logic: an abort condition collapses the machine to a known safe state — all valves shut, agitator off — rather than leaving a valve stranded open mid-phase.
Running and auto-grading the batch mixer in your browser
The Batch Mixer scenario is fully runnable in the browser — no PLC, no TIA Portal, no Studio 5000. You write the ladder logic (or structured-text-style state rungs), press Run, and a physics model simulates the tank: levels rise as VALVE_A and VALVE_B run, the level switches trip at their setpoints, the agitator timer counts, and the tank drains until TANK_EMPTY_LS fires.
Five auto-grader test cases check the program against the real specification. 'idle-to-ready-happy-path' runs a complete batch with CIP disabled and asserts READY_LAMP is on — with all valves and the agitator off — at the end. 'valve-a-off-when-level-a-reached' forces LEVEL_A_LS true and asserts VALVE_A closes within 200 ms. 'valve-b-only-after-a-complete' confirms VALVE_B stays off for the entire FILLING_A phase and only opens once LEVEL_A_LS has tripped. 'mix-time-minimum-30s' verifies the agitator is still running and the drain valve still shut 29 seconds into MIX, then opens the drain only after the full 30 seconds. 'cip-requires-empty-tank' runs a CIP-enabled batch and confirms CIP_VALVE stays off while the tank is still draining, opening only once TANK_EMPTY_LS trips.
Because the grader inspects both the output coils and internal physics state (level values, switch states), it catches the subtle mistakes that pass a casual eye test — a valve that opens a scan too early, a mix that ends a second short, a CIP wash that starts before the tank is empty. That feedback loop is what makes this a practical way to learn mixing tank PLC programming without a lab bench.
