PLC Simulator
Counters

CTD — Count Down

CTD (Count Down) decrements its counter value by one each time its rung transitions from false to true — typically counting a loaded quantity down toward empty.

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How it works

What CTD does during the scan

CTD is CTU’s mirror: same preset/accumulator/status structure, same one-count-per-rising-edge rule, opposite direction. The natural mental model is depletion — load the counter with a quantity, then count down as items leave: bottles out of a magazine, doses out of a batch, free slots out of a buffer.

Here is the detail that trips up everyone who moves between platforms, and it is worth being precise about. In the IEC 61131-3 CTD function block (CODESYS, TIA Portal, OpenPLC), the LD input loads CV with the preset PV, each CD pulse decrements CV, and the Q output turns on when CV ≤ 0 — Q genuinely means "empty". In Allen-Bradley Logix, CTD was designed as the partner of CTU on the same counter tag: a CTD pulse decrements ACC, but the DN bit still means ACC ≥ PRE, exactly as it does for CTU. Logix DN on a CTD does not mean "reached zero" — it means "still at or above preset". If you want an empty signal in Logix, compare ACC to zero with a LEQ/EQU instruction.

That design difference reveals the intended Logix idiom: CTU and CTD instructions on separate rungs addressing the same counter, one incrementing on the in-feed sensor, one decrementing on the out-feed sensor. ACC then tracks the live quantity in the zone and DN tells you when the zone holds at least PRE items. The standalone load-and-count-down pattern, by contrast, is the native IEC CTD shape.

Like all counters, CTD is retentive and edge-sensitive: false rungs and power cycles leave the value untouched, pulses shorter than a scan get missed, and clearing or reloading takes an explicit act — RES plus a MOV of the start quantity in Logix, or a pulse on the LD input in IEC.

CTD count-down instruction highlighted on a ladder rung — an Exit_Sensor contact pulsing a CTD counter block, with the low-count condition driving a Zone_Empty coil on the rung belowTwo ladder rungs. Rung 1: an XIC contact tagged Exit_Sensor drives the highlighted CTD count-down block showing Counter C1, PRE 10 and ACC 4; the accumulator decrements once per false-to-true rung transition. Rung 2: a contact monitoring the counter's empty condition drives an OTE coil tagged Zone_Empty.L1L2Exit_SensorXICCTDCounter C1PRE 10ACC 4CV = 0LEQ / QDZone_EmptyOTEACC counts down one per pulse
Rung 1: each exit pulse decrements the highlighted CTD. Rung 2: the empty condition (CV = 0 — via QD/Q in IEC or a LEQ compare in Logix) drives the Zone_Empty output.
CTD timing diagram — the current value starts loaded at the preset 4 and steps down one per count pulse until the empty output turns on at zeroThree lanes over time. Lane 1: a load pulse followed by four narrow CD count-down pulses. Lane 2: the current value CV drawn as a staircase loaded to the preset 4 by LD, then stepping down one level per pulse to zero. Lane 3: the Q empty output switching on when CV reaches zero.count down from preset →CD pulseCVLD loads PV=4Q (empty)IEC Q sets at CV ≤ 0 (AB DN differs — see table)
CTD timing (IEC semantics): LD loads CV with the preset, each CD pulse steps CV down, and Q switches on when CV reaches zero.

Across vendors

CTD in Allen-Bradley, Siemens, IEC 61131-3 and Mitsubishi

PlatformName / syntaxNotes
Allen-Bradley (Studio 5000 / RSLogix)CTDDecrements ACC on the rung’s rising edge. DN still means ACC ≥ PRE (designed to pair with a CTU on the same tag). Detect empty with LEQ Counter.ACC 0.
IEC 61131-3 (CODESYS, OpenPLC)CTD FBPins CD, LD, PV in; Q, CV out. LD loads CV := PV; Q is true while CV ≤ 0. The natural load-then-deplete counter.
Siemens (TIA Portal)CTDIEC-style CTD with an instance DB; LD load input, Q at CV ≤ 0. Legacy STL S_CD counters appear in migrated S7-300/400 code.
Mitsubishi (GX Works)Down / bidirectional countersFX-series 32-bit counters C200–C234 count up or down depending on direction flags M8200–M8234; there is no separate CTD mnemonic in basic FX ladder.

The one fact to carry between platforms: Allen-Bradley CTD’s DN bit and IEC CTD’s Q output answer different questions (at-or-above-preset vs at-zero). Porting logic without translating that difference produces counters that "work" and lie.

In practice

Worked CTD examples

Example 1 — magazine low warning (IEC shape)

| New_Stick_Loaded                      CTD Mag_Counter   |
|-----] [------------------------------[ LD  PV=50      ]-|

| Label_Applied                          CTD Mag_Counter  |
|-----] [------------------------------[ CD             ]-|

| Mag_Counter.Q                            Refill_Beacon  |
|-----] [--------------------------------------( )-------|

A labeller magazine holds 50 labels. Loading a new stick pulses LD, setting CV to 50; every applied label pulses CD, counting down. Q fires the refill beacon at zero. To warn before running dry, compare CV instead — for example LEQ Mag_Counter.CV 5 driving a pre-warning — which is usually more useful than the hard empty signal.

Example 2 — zone occupancy with a CTU/CTD pair (Logix shape)

| Entry_Eye                             CTU Zone_Count    |
|-----] [------------------------------[ PRE 8          ]-|

| Exit_Eye                              CTD Zone_Count    |
|-----] [------------------------------[ same counter   ]-|

| Zone_Count.DN                            Zone_Full      |
|-----] [--------------------------------------( )-------|

Both instructions address the same counter tag: entries increment ACC, exits decrement it, so ACC is the live number of parts in the zone. DN (ACC ≥ 8) holds off the upstream conveyor while the zone is full — and here the Logix DN semantics are exactly what you want, which is why the pairing exists.

In an IEC platform the equivalent single block is CTUD, which exposes both the full (QU) and empty (QD) conditions — see the CTUD page.

Gotchas

Common CTD mistakes

  • Treating Logix CTD.DN as an empty signal

    In Studio 5000, DN means ACC ≥ PRE for both CTU and CTD. A rung waiting for CTD.DN to detect zero waits forever (or worse, triggers while stock remains). Compare ACC against 0 explicitly, or use the IEC-style CTUD QD output.

  • Never reloading the counter

    A depletion counter needs a load event: RES + MOV of the start quantity in Logix, or an LD pulse in IEC. Without it the second batch starts from zero — or from a negative count.

  • Letting ACC go negative unnoticed

    Extra exit pulses (sensor chatter, a hand waved through the beam) keep decrementing below zero. Guard the CD rung with a GRT ACC 0 condition, or clamp/alarm on negative counts — a zone showing −3 parts is telling you a sensor lies.

  • Mixing up which sensor drives which instruction

    In CTU/CTD pairs, swapping the entry and exit sensors inverts the whole zone model and DN becomes a "zone empty-ish" bit. Name the rung comments explicitly ("entry increments", "exit decrements") — future-you is the maintenance tech at 3 a.m.

Run CTD live — no install

Drop the instruction on a rung in the browser simulator, toggle the inputs, and watch the rung state, accumulator values and outputs update scan by scan.

Run a counter scenario liveFull guide: PLC counters (CTU, CTD, CTUD)Open the free browser simulator

Questions

CTD — frequently asked

What does the CTD instruction do in a PLC?

CTD (Count Down) decrements its counter value by one each time its rung (or CD input) transitions from false to true. It is used to count a known quantity down toward zero — stock in a magazine, spaces in a buffer — or paired with a CTU on the same counter to track a live quantity.

When does the CTD done bit turn on?

It depends on the platform, and the difference matters. In IEC 61131-3 (CODESYS, TIA Portal) the CTD Q output turns on when CV ≤ 0 — it signals empty. In Allen-Bradley Logix, CTD shares the counter’s DN bit with CTU and DN means ACC ≥ PRE — to detect empty in Logix, compare ACC to zero with LEQ or EQU.

How do I load a value into a CTD counter?

IEC CTD blocks have a dedicated LD input: pulse it true and CV is loaded with the preset PV. Allen-Bradley CTD has no load pin — use a MOV instruction to write the start quantity into Counter.ACC (often paired with RES) when the process reloads.

Can I use CTU and CTD on the same counter?

Yes — in Allen-Bradley that is the intended idiom: a CTU rung increments and a CTD rung decrements the same counter tag, so ACC tracks a bidirectional quantity and DN reports "at or above preset". In IEC platforms the same job is done in one instruction: the CTUD function block.

Related instructions

Technical reference and worked-example guide

CTD down-counter instruction: field reference

Direct answer

The reader can define the count edge, initial accumulator, preset comparison and reset or load behavior, then test exact boundaries.

Written for pLC learners and maintainers using CTD for remaining parts, capacity, attempts or reverse position counts.

an automation engineer correlating PLC state, scan evidence and a controlled conveyor response at a logic diagnostics workstation while studying PLC count-down edge, accumulator and done-state behavior

System map / 02

Six checkpoints for CTD down-counter instruction

NODE 01observable

Definition

Target platform, counter instance, count-down edge, accumulator, preset, done condition, load or reset owner, data range, scan order, startup and physical meaning.

NODE 02observable

Signal path

Field event through input transition, edge memory, counter state, comparison bits, downstream decision and independently observed quantity.

NODE 03observable

Worked example

Known initial count decremented once per valid edge to the declared completion state.

NODE 04observable

Limits

Held input, bounce, repeated edge, simultaneous load and count, zero crossing, underflow, skipped call, power return and multiple writers.

NODE 05observable

Common mistake

An input, edge, instance, accumulator, preset, data-range, reset, scan-order or physical-count mismatch.

NODE 06observable

Verification

The counter case verified with current target instruction help and representative event timing.

Answer surface / 07

Questions people ask about CTD down-counter instruction

What does a CTD instruction do?

It decrements an owned counter value on a defined transition and exposes status based on the platform-specific preset and accumulator relationship.

Why does a CTD count more than once?

Input bounce, repeated false-to-true transitions, duplicate calls, multiple writers or misunderstood edge behavior can create extra decrements.

PLC code and example path

Move from one instruction to a tested control pattern

Read the instruction behavior, inspect a complete pattern, run its edge cases and then adapt it as a project.